The TPS3809 family of supervisory circuits provides circuit initialization and timing
supervision, primarily for DSPs and processor-based systems.
During power-on, RESET is asserted when the supply voltage VDD
becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD
and keeps RESET active as long as VDD remains below
the threshold voltage VIT. An internal timer delays the return of the output
to the inactive state (high) to ensure proper system reset. The delay time,
td(typ) = 200 ms, starts after VDD has risen above
the threshold voltage VIT. When the supply voltage drops below the threshold
voltage VIT, the output becomes active (low) again. No external components
are required. All the devices of this family have a fixed sense-threshold voltage
VIT set by an internal voltage divider.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The
circuits are available in a 3-pin SOT-23. The TPS3809xxx-Q1 devices are characterized for operation
over a temperature range of 40°C to 125°C, and are qualified in accordance with AEC-Q100 stress
test qualification for integrated circuits. For more information about TIs voltage supervisor
portfolio, please visit the Supervisor and Reset IC Overview web page.
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