The TPS3813-Q1 supervisory circuits provide circuit initialization and
timing supervision, primarily for DSPs and processor-based systems.
During power on, the RESET pin is asserted when the supply voltage
(VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit
monitors VDD and keeps the RESET pin active as long
as VDD remains below the threshold voltage
An internal timer delays the return of the output to the inactive (high) state to ensure
proper system reset. The delay time, td = 25 ms typical, begins after
VDD has risen above the threshold voltage (VIT). When
the supply voltage drops below the threshold voltage (VIT), the output
becomes active (low) again. No external components are required. All the devices of this family
have a fixed-sense threshold voltage (VIT) set by an internal voltage
For safety-critical applications, the TPS3813-Q1 family of devices incorporate a window-watchdog with
programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either
connecting the WDT pin to GND or VDD, or by using an external capacitor. The
lower limit, and thus the window ratio, is set by connecting the WDR pin to GND or
VDD. The RESET pin will
assert a reset to the microcontroller if the watchdog is incorrectly serviced.
The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The
devices are available in a 6-pin SOT-23 package. The devices are characterized for operation over a
temperature range of –40°C to 125°C.
For all available packages, see the orderable addendum at the
end of the data sheet.
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