See datasheet for actual packaging/pinout drawings


Package | PIN:

DRC | 10


I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)


3A Sink/Source DDR Termination Regulator w/ VTTREF Buffered Reference for DDR2, DDR3, DDR3L and DDR4

TI Store Price:

1 - 9 $ 0.81
10 - 24 $ 0.73
25 - 99 $ 0.65
100 - 249 $ 0.60
250 - 499 $ 0.54
500 - 749 $ 0.44
750 - 999 $ 0.36

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Texas Instruments TPS51200DRCR

The device is a sink and source double data rate (DDR) termination regulator specifically designed for low input voltage, low-cost, low-noise systems where space is a key consideration.

The maintains a fast transient response and requires a minimum output capacitance of only 20 μF. The supports a remote sensing function and all power requirements for DDR, DDR2, DDR3, DDR3L, Low-Power DDR3 and DDR4 VTT bus termination.

In addition, the provides an open-drain PGOOD signal to monitor the output regulation and an EN signal that can be used to discharge VTT during S3 (suspend to RAM) for DDR applications.

The is available in the thermally efficient 10-pin VSON thermal pad package, and is rated both Green and Pb-free. It is specified from –40°C to +85°C.

For all available packages, see the orderable addendum at View datasheet
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