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TPS51206EVM-745-2-A Peak Sink/Source DDR Termination Regulator With VTTREF Buffered Reference

The TPS51206EVM-745 evaluation module (EVM) uses the TPS51206. The TPS51206 is a sink/source double data rate (DDR) termination regulator with VTTREF buffered reference output. It is specifically designed for low-input voltage, low cost, low external component count systems where space is a key consideration. The TPS51206EVM-745 is designed to provide proper termination voltage and a 10-mA buffered reference voltage for DDR memory which covers DDR2 (0.9VTT), DDR3 (0.75VTT), DDR3L (0.675VTT) and DDR4 (0.6VTT) specifications with minimal external components

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