The device is a FET-integrated synchronous buck regulator designed mainly
for DDR termination. It can provide a regulated output at ½ VDDQ
with both sink and source capability. The device employs D-CAP+ mode operation
that provides ease of use, low external component count and fast transient
response. The device can also be used for other point-of-load (POL) regulation
applications requiring up to 6 A. In addition, the device supports full, 6-A,
output sinking current capability with tight voltage regulation.
The device features two switching frequency settings (600 kHz and 1 MHz),
integrated droop support, external tracking capability, pre-bias startup,
output soft discharge, integrated bootstrap switch, power good function, V5IN
pin UVLO protection, and supports both ceramic and SP/POSCAP capacitors. It
supports input voltages up to 6.0 V, and output voltages adjustable from to
The device is available in the 3.5 mm × 4 mm, 20-pin, VQFN package (Green
RoHs compliant and Pb free) with TI proprietary Integrated MOSFET and packaging
technology and is specified from –40°C to 85°C.
For all available
packages, see the orderable addendum at the end of the data sheet.
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