See datasheet for actual packaging/pinout drawings

Packaging

Package | PIN:

YFF | 30

Temp:

I (-40 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)

TPS657120YFFR


RF frontend Power Management IC (PMIC)

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Texas Instruments TPS657120YFFR

The TPS657120 provides three configurable step-down converters with up to 2-A output current.This device also has 2 LDO regulators. LDO1 can be supplied from either the input voltage directly or from a pre-regulated supply such as DCDC1 or DCDC2. The input voltage to LDO2 is used as an analog supply input and therefore must be tied to the input voltage at the same voltage level with VINDCDC1/2 and VINDCDC3. The internal power-up and power-down controller is configurable and can support any power-up/power-down sequences (OTP based). All LDOs and DCDC converters are controllable by a MIPI RFFE compatible interface, by pins PWRON, CLK_REQ1 and CLK_REQ2, or both. In addition, there is a nRESET as well as a RFFE address select (ADR_SELECT) input which can alternatively be used as general purpose I/Os with a 1-mA sink capability. The TPS657120 comes in a 6-ball × 5-ball DSBGA package (2.5 mm × 2.3 mm) with a 0.4-mm pitch.

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