See datasheet for actual packaging/pinout drawings


Package | PIN:

RHB | 32


S (-20 to 85)

ECO Plan:

Green (RoHS & no Sb/Br)


TRF7963A Fully Integrated 13.56-MHz RFID Reader/Writer IC for ISO14443A/B

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Texas Instruments TRF7963ARHBT

The TRF7963A device is an integrated analog front end (AFE) and data-framing device for a 13.56-MHz RFID reader/writer system. Built-in programming options make it suitable for a wide range of applications for proximity identification systems.

The reader is configured by selecting the desired protocol in the control registers. Direct access to all control registers allows fine tuning of various reader parameters as needed.

Comprehensive documentation, reference designs, evaluation modules, and TI microcontrollers (based on MSP430 or ARM technology) source code are available.

The TRF7963A device is a high-performance 13.56-MHz HF RFID reader IC comprising an integrated AFE and a built-in data framing engine for ISO14443A/B and FeliCa. The device supports data rates up to 848 kbps for ISO14443 with all framing and synchronization tasks onboard (in ISO Mode, default). The TRF7963A device also supports NFC Forum Tag Types 1, 2, 3, and 4 operations (as reader/writer only). This architecture lets the customer build a complete and cost-effective yet high-performance HF RFID/NFC reader/writer using a low-cost microcontroller (for example, an MSP430).

Other standards and even custom protocols can be implemented by using two of the direct modes that the device offers. These direct modes (0 and 1) let the user fully control the AFE and also gain access to the raw subcarrier data or the unframed, but already ISO-formatted, data and the associated (extracted) clock signal.

The receiver system has a dual-input receiver architecture. The receivers also include various automatic and manual gain control options. The received input bandwidth can be selected to cover a broad range of input subcarrier signal options.

The received signal strength from transponders, ambient sources or internal levels is available in the RSSI register. The receiver output is selectable among a digitized subcarrier signal and any of the integrated subcarrier decoders. The selected subcarrier decoder delivers the data bitstream and the data clock as outputs.

The TRF7963A device includes a receiver framing engine. This receiver framing engine performs the Cyclic Redundancy Check (CRC) or parity check, removes the Start Of Frame (SOF) and End Of Frame (EOF) settings, and organizes the data in bytes for ISO14443A/B and NFC Forum protocols. Framed data is then accessible to the microcontroller unit (MCU) through a 12-byte FIFO register.

A parallel or serial interface (the SPI) can be used for the communication between the MCU and the TRF7963A reader. When the built-in hardware encoders and decoders are used, transmit and receive functions use a 12-byte FIFO register. For direct transmit or receive functions, the encoders or decoders can be bypassed so the MCU can process the data in real time. The TRF7963A device supports data communication levels from 1.8 V to 5.5 V for the MCU I/O interface. The transmitter has selectable output power levels of 100 mW (+20 dBm) or 200 mW (+23 dBm) equivalent into a 50-Ω load when using a 5-V supply.

The transmitter supports OOK and ASK modulation with selectable modulation depth. The TRF7963A device includes a data transmission engine that supports modified Miller encoding for ISO14443A/B and FeliCa. Included with the transmit data coding is the automatic generation of SOF, EOF, CRC, and parity bits. Several integrated voltage regulators ensure a proper power-supply noise rejection for the complete reader system. The built-in programmable auxiliary voltage regulator VDD_X (pin 32) delivers up to 20 mA to supply an MCU and additional external circuits within the reader system.

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