The TS3DDR32611EVM allows evaluation of the basic functionality of the TS3DDR32611. Test points and headers are placed throughout the board to provide testing capability for each pin of the device and are labeled with the corresponding pin name beside the header pins.
The TS3DDR32611 is a sink/source low power double data rate type III (PCDDR3) termination regulator with a 1% accuracy buffered reference output. It has 26 built-in termination SPST switches that can be shut off when the memory system undergoes lower speed operation without the need of termination resistors. Turning off these switches enables huge power saving on the memory system. The switches have low on-state resistance (typical of 1.75Ω and maximum of 4Ω), which helps retain signal integrity of the signal lines.