See datasheet for actual packaging/pinout drawings

TSW14J56EVM


TSW14J56 Evaluation Module

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Texas Instruments TSW14J56EVM

The Texas Instruments TSW14J56 Evaluation Module (EVM) is a next generation of pattern generator and data capture card used to evaluate performances of the new Texas Instruments (TI) JESD204B family of high-speed analog-to-digital converters (ADC) and digital-to-analog converters (DAC).

Populated with an Arria V GZ device and using Altera’s JESD204B IP solution, the TSW14J56 can be dynamically configurable to support all lanes speeds from 600Mbps to 12.5Gbps, from 1 to 8 lanes, 1 to 16 converters, and 1 to 4 octets per frame.

Together with the accompanying High Speed Data Converter Pro Graphic User Interface (GUI), it is a complete system that captures and evaluates data samples from ADC EVM’s and generates and sends desired test patterns to DAC EVM’s. 

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