See datasheet for actual packaging/pinout drawings

TSW14J57EVM


TSW14J57 Evaluation Module

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Texas Instruments TSW14J57EVM

The TI TSW14J57 evaluation module (EVM) is a next-generation of pattern generator and data capture card used to evaluate the performance of the new TI JESD204B family of high-speed analog-to-digital converters (ADCs) and digital-to-analog converters (DACs).

Populated with an Arria® 10 device and using the Altera® JESD204B IP solution, the TSW14J57 can be dynamically configured to support all lane speeds from 1.6 Gbps to 15 Gbps - from 1 to 16 lanes.

Together with the accompanying High-Speed Data Converter Pro (HSDC Pro) graphic user interface (GUI), it is a complete system that captures and evaluates data samples from ADC EVMs, and generates and sends desired test patterns to DAC EVMs.

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