The UCC2946 is designed to provide accurate microprocessor supervision, including reset and watchdog functions. During power up, the device asserts a reset signal RES with VDD as low as 1 V. The reset
signal remains asserted until the VDD voltage rises and remains above the reset threshold for the reset period. Both reset threshold and reset period are programmable
by the user.
The UCC2946 is also resistant to glitches on the VDD line. Once RES has been deasserted, any drops below the
threshold voltage need to be of certain time duration and voltage magnitude to generate a reset signal. These values are shown in. An I/O line of the microprocessor may be tied to the watchdog input (WDI) for watchdog functions. If the I/O line is not toggled within a set watchdog period, programmable by the user, WDO is asserted. The watchdog function is disabled during reset
The UCC2946 is available in 8-pin TSSOP (PW) package to optimize board space.
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