XIO3130EVM XIO3130EVM Evaluation Module angled board image

XIO3130EVM

XIO3130EVM Evaluation Module

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Features for the XIO3130EVM

  • PCI Express Base Specification, Revision 1.1
  • PCI Express Card Electromechanical Specification, Revision 1.1
  • PCI-to-PCI Bridge Architecture Specification, Revision 1.1
  • PCI Bus Power Management Interface Specification, Revision 1.2
  • PCI Express Fanout Switch With One x1 Upstream Port and Three x1 Downstream Ports
  • Packet Transmission Starts While Reception Still in Progress (Cut-Through)
  • 256-Byte Maximum Data Payload Size
  • Peer-to-Peer Support
  • Wake Event and Beacon Support
  • Support for D1, D2, D3hot, and D3cold
  • Active State Power Management (ASPM) Using Both L0s and L1
  • Low-Power PCI Express Transmitter Mode
  • Integrated AUX Power Switch Drains VAUX Power Only When Main Power Is Off
  • Integrated PCI Hot Plug Support
  • Integrated REFCLK Buffers for Switch Downstream Ports
  • 3.3-V Multifunction I/O Pins for PCI Hot Plug Status and Control or General Purpose I/Os
  • Optional Serial EEPROM for System-Specific Configuration Register Initialization

Description for the XIO3130EVM

The Texas Instruments XIO3130 EVM is a functional implementation of a four-port PCIe-to-PCIe switch. The XIO3130 EVM was designed to allow validation of three separate functional modes. In normal mode the EVM is configures as a generic PCI Express switch. In Hot Plug modedownstream ports 1 and 2 are configured as Hot Pluggable slots. In ExpressCard mode all three downstream ports are configured to support the ExpressCard adapter board. The different functional modes will be discussed later in this document.

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